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Technologies Defined for Intel® Mobile and Desktop Processors

Documentation

Production Information & Documentation

000006513

02/07/2018

The technologies listed beneath for Intel® Mobile and Desktop Processors serve a variety of purposes. Click each item to read more about their purposes and locate additional resource for support.

This is meant to be comprehensive list and not all processor families contain all technologies. To see if your product contains a particular technology, visit product information pages.

Click or the topics to expand the content:

Intel® Turbo Boost Technology

Intel® Turbo Boost Technology is 1 of the many exciting new features that Intel has built into latest-generation Intel microarchitecture. It automatically allows processor cores to run faster than the base operating frequency if it's operating below power, electric current, and temperature specification limits.

The maximum frequency of Intel Turbo Boost Applied science is dependent on the number of active cores. The corporeality of time the processor spends in the Intel Turbo Heave Engineering science state depends on the workload and operating environment, providing the operation you lot demand, when and where you need it.

Any of the following tin can ready the upper limit of Intel Turbo Heave Technology on a given workload:

  • Number of active cores
  • Estimated current consumption
  • Estimated ability consumption
  • Processor temperature

When the processor is operating below these limits and the user's workload demands boosted performance, the processor frequency will dynamically increase by 133 MHz on short and regular intervals until the upper limit is met or the maximum possible upside for the number of agile cores is reached.

Intel® Hyper-Threading Technology Intel® Hyper-Threading Engineering science (Intel® HT Technology) enables the processor to execute multiple threads (a part of a program) in parallel, and so your highly-threaded software can run more efficiently and you tin can multitask more effectively than ever before.
Intel® Virtualization Technology (VT-x) Intel® Virtualization Technology is a set of hardware enhancements to Intel server and client platforms that can meliorate virtualization solutions. Virtualization enhanced by Intel Virtualization Applied science will allow a platform to run multiple operating systems and applications in independent partitions.
Intel® Virtualization Engineering for Directed I/O (VT-d) Intel® Virtualization Technology for Directed I/O (Intel® VT-d) provides hardware assists for virtualization solution. Intel® VT-d continues from the existing back up for IA-32 (VT-x) and Intel® Itanium® Processor (VT-i) virtualization adding new support for I/O-device virtualization. Intel VT-d tin help end users improve security and reliability of the systems and also improve performance of I/O devices in virtualized environment. These inherently help It managers reduce the overall total cost of ownership past reducing potential reanimation and increasing productive throughput by better utilization of the data center resources.
Intel® Trusted Execution Applied science Intel® Trusted Execution Technology for safer computing is a versatile prepare of hardware extensions to Intel® Processors and chipsets that enhance the digital role platform with security capabilities such equally measured launch and protected execution. Intel Trusted Execution Technology provides hardware-based mechanisms that aid protect against software-based attacks and protects the confidentiality and integrity of information stored or created on the client PC. Information technology does this by enabling an environment where applications can run within their own infinite - protected from all other software on the system. These capabilities provide the protection mechanisms, rooted in hardware, that are necessary to provide trust in the awarding'due south execution surround. In turn, this can help to protect vital data and processes from beingness compromised by malicious software running on the platform.
Intel® AES new instructions

Intel® AES instructions are a new set of instructions bachelor beginning with the 2010 Intel® Core™ Processor Family unit based on the 32nm Intel® microarchitecture. These instructions enable fast and secure data encryption and decryption, using the Advanced Encryption Standard (AES), which is defined past FIPS Publication number 197. Since AES is currently the dominant cake nothing, it is used in various protocols. The new instructions are valuable for a wide range of applications.

The architecture consists of six instructions that offer total hardware support for AES. Four instructions support the AES encryption and decryption, and the other 2 instructions support the AES cardinal expansion.

The AES instructions have the flexibility to support all usages of AES, including all standard central lengths, standard modes of operation, and even some nonstandard or future variants. They offer a significant increase in performance compared to the current pure-software implementations.

Beyond improving performance, the AES instructions provide important security benefits. By running in data-independent time and not using tables, they assistance in eliminating the major timing and cache-based attacks that threaten table-based software implementations of AES. In addition, they make AES simple to implement, with reduced code size, which helps reducing the adventure of inadvertent introduction of security flaws, such as difficult-to-detect side channel leaks.

Intel® 64 Architecture

Intel® 64 Architecture is an enhancement to the Intel IA-32 architecture. The enhancement allows the processor to run 64-bit code and access larger amounts of retention.

Intel 64 Architecture delivers 64-fleck calculating on server, workstation, desktop and mobile platforms when combined with supporting software. Intel 64 Compages improves performance by allowing systems to address more than 4 GB of both virtual and physical memory.

Intel 64 provides support for the following:

  • 64-bit flat virtual address space
  • 64-bit pointers
  • 64-fleck broad general purpose registers
  • 64-bit integer support
  • Upwards to one terabyte (TB) of platform address space
Idle states

A C-country is an idle state. Modern processors have several different C-states representing increasing amounts of pieces to shut down. C0 is the operational country, meaning that the CPU is doing useful piece of work. C1 is the start idle state. The clock running to the processor is gated. In other words, the clock is prevented from reaching the core, effectively shutting it down in an operational sense. C2 is the second idle country. The external I/O Controller Hub blocks interrupts to the processor. And so on with C3, C4, etc.

A core C-state is a hardware C-state. There are several core idle states, like CC1 and CC3. Every bit we know, a modernistic country-of-the-art processor has multiple cores. What we used to think of every bit a CPU or processor really has multiple full general purpose CPUs inside of it. The Intel® Core™ Duo Processor has two cores in the processor fleck. The Intel® Core™2 Quad Processor has four such cores per processor chip. Each of these cores has its own idle state. This makes sense as one core might be idle while another is difficult at work on a thread. So, a core C-state is the idle state of one of those cores.

A processor C-state is related to a core C-state. At some point, cores share resources, like the L2 cache or the clock generators. When one idle core, say core 0, is ready to enter CC3 but the other, say core one, is nonetheless in C0, nosotros practice not want the fact that core 0 is ready to descend into CC3 to forbid core i from executing considering nosotros simply happened to shut downwards the clock generators. Thus nosotros have the processor or package C-state, or PC-state. The processor tin can only enter a PC-state, say PC3, if both cores are ready to enter that CC-state, e.g. both cores are ready to stride into CC3.

A logical C-state: The final C-state is the OS's view of the processors' C-states. In Windows, a processor's C-state is pretty much equivalent to a core C-state. In fact, the OS'due south lower level ability management software determines when and if a given cadre enters a given CC-state using the MWAIT pedagogy. There is i of import deviation. When an awarding, such as Intel® Power Informer, thinks information technology's interrogating a processor cadre CC-state, what is returned is the C-state of what is called a logical cadre. A logical core is technically not the same as a physical core. Logical cores don't have to worry about little things such as the hardware the OS is running on. For instance, the C-state of a logical core doesn't worry about the barriers imposed by shared resource, such every bit the clock generators discussed before. Logical Core 0 can be in C3 while Logical Core i is in C0.

For a deeper caption of C states, delight refer to the following article: (update) C-states, C-states and even more C-states.

Enhanced Intel Speedstep® Engineering

Enhanced Intel SpeedStep® Technology is an advanced applied science which significantly reduces the processor voltage (and temperature), hence leakage ability, when processor activity is low. Enhanced Intel Speedstep Engineering science has revolutionized thermal and power management past giving awarding software greater control over the processor's operating frequency and input voltage. Systems can easily manage power consumption dynamically.

Separation betwixt Voltage and Frequency Changes
Past stepping voltage upward and downward in modest increments separately from frequency changes, the processor is able to reduce periods of system unavailability (which occur during frequency change). Thus, the arrangement is able to transition between voltage and frequency states more oft, providing improved power/functioning remainder.

Clock Segmentation and Recovery
The motorbus clock continues running during state transition, even when the cadre clock and Phase-Locked Loop are stopped, which allows logic to remain active. The core clock is also able to restart far more than rapidly under Enhanced Intel SpeedStep Technology than under previous architectures.

Intel demand-based switching Demand-based switching is a ability management technology developed past Intel in which the applied voltage and clock speed for a microprocessor are kept to the minimum necessary to allow optimum performance of required operations. A microprocessor equipped with DBS operates at reduced voltage and clock speed until more processing power is actually required.
(Source: Searchenterpriselinux demand based switching*)
Thermal monitoring technologies Laptops using mobile Intel® Processors require thermal management. The term thermal management refers to two major elements: a cooling solution properly mounted to the processor, and effective airflow through a function of that cooling solution to evacuate rut out of the organization. The ultimate goal of thermal management is to go on the processor at or below its maximum operating temperature (Instance).
Execute Disable Bit The Execute Disable Scrap capability is a processor feature that tin help foreclose buffer overflow virus attacks.
Cache information Cache is very loftier-speed memory that stores frequently used instructions and data. Enshroud information reported past the utility may include level 3, level 2, and level one data and teaching cache sizes, depending on what types of cache are present and enabled in the processor. In processors with multiple cores, the cache blocks may be separate for each core (e.g. 2 x 1 MB) or shared beyond cores (e.one thousand. 2 MB). The Frequency Test section of the utility reports the cache size that the tested processor core has access to for the highest-level cache in the processor. The CPUID Data section of the utility reports the total number of enshroud blocks bachelor in the processor package.
Chipset ID The Chipset ID field is used to provide data related to the Intel® Upgrade Service.
Enhanced halt state The enhanced halt land processor feature is designed to improve acoustics by lowering the power requirements of the processor.
Expected frequency Expected frequency is the frequency at which Intel intended the processor and the arrangement bus to run. This should exist the speed physically marked on the processor's packaging.
Gigatransfers per second (GT/s) Gigatransfers per second (GT/s) refers to the effective rate of data transfers on the Intel® QuickPath Interconnect, measured in billions of transfers per second.
Integrated memory controller The integrated memory controller is a central feature in Intel® QuickPath Architecture. Integrating the retention controller into the Intel® Processor silicon die improves retentivity admission latency and enables available memory bandwidth to scale with the number of processors added.
Intel® QuickPath Interconnect Intel QuickPath Interconnect provides high-speed point-to-point connections betwixt processors and other components in platforms designed with Intel® QuickPath Compages.
Overclock

Operation of a processor above the manufacturer's specified frequency (e.chiliad. operating at 3.2 GHz with a processor that Intel manufactured to run at 2.8 GHz).

A processor being operated above its frequency specification (overclocked) may become unstable, or produce unpredictable or erroneous results. These atmospheric condition might non be readily apparent, and the life of the processor may as well be shortened. Intel'south warranty does non cover processors that have been overclocked.

Packaging information

The Micro-FCBGA (FCBGA rBGA or BGA) and The Micro-FCPGA (FCPGA, rPGA, PGA)

The Micro-FCBGA (Flip Fleck Brawl Grid Assortment) is Intel's current BGA mounting method for mobile processors that apply a flip chip bounden technology. It was introduced with the Mobile Intel® Celeron® Processor. This is thinner than a pin grid assortment socket arrangement, but is not removable (solider to the lath).

A flip chip pin grid assortment (FC-PGA or FCPGA) is a class of pin grid array in which the die faces downwards on the meridian of the substrate with the back of the dice exposed. This allows the die to take more than directly contact with the heatsink or other cooling mechanism.

The FC-PGA was introduced by Intel with the Intel® Pentium® 3 and Celeron® Processors based on Socket 370, and was after used for Socket 478-based Intel® Pentium® iv and Celeron® Processors. FC-PGA processors fit into zero insertion force (ZIF) Socket.

  • uPGA/BGA - a Micro Pin Grid Array or Ball Grid Array package.
  • OOI - an OLGA (Organic Country Filigree Array) On Interposer parcel translates the fine pitch pads of the OLGA package to a pivot field, which connects into the socket on the system main board.
  • uFCPGA or uFCPGA2 - a Micro Flip Chip Pin Grid Array bundle.
  • uFCBGA or uFCBGA2 - a Micro Flip Chip Ball Filigree Array package.
  • FCPGA(Pin Count) 946/946B, uses a Socket G3/rPGA946B/rPGA947.
  • FCBGA(Pin Count) 1168/1364, BGA does not use a socket, directly continued to the board.
  • LGA1366 - a 1366 pin Land Grid Array package.
  • LGA1156 - a 1156 pin Land Filigree Array parcel.
  • LGA775 - a 775 pin Country Filigree Array package.
  • LGA771 - a 771 pin Land Grid Array package.

For more information, meet the Intel® Desktop Processors package type guide.

Platform compatibility guide Platform Compatibility Guide (PCG) encompasses all of the platform power requirements necessary for the proper functionality of the processor as it relates to the motherboard. PCG too provides an easier method of identifying which processor works with which motherboard.
Processor brand name Branded name assigned by Intel Corporation to a specific processor, eastward.grand. Intel® Pentium® 4 Processor.
Processor family unit

This nomenclature indicates the Intel® Microprocessor generation and make. For example, Intel® Pentium® 4 Processors have a Family value of F.

This information can be useful for validating information from the Quick Reference Guide available for the specific family unit of your processor.

Processor model The model number identifies the Intel Microprocessor'southward manufacturing engineering and design generation (for example, Model 4). Model number is used along with family to determine which specific processor in a family of processors that your computer contains. This data is occasionally needed when communicating with Intel to place the detail processor.
Processor number Intel uses processor numbers to enable consumers to speedily differentiate among comparable processors and to analyze or take into account more than one processor feature during the selection process. Processor numbers should be used to differentiate between the relative overall features within a sure processor family unit (for example, inside the Intel® Pentium® 4 Processor family) and within a numbering sequence (like 550 vs. 540). Processor numbers are not a measurement of performance.
Read more about Intel® Processor Numbers.
Processor revision The revision number indicates version information for Intel® Processors within a stepping. The revision information may be useful when communicating with Intel to determine the processor's internal characteristics.
Processor stepping The stepping number indicates the design or manufacturing revision data for the product Intel microprocessors (for example, Stepping 4). Unique stepping numbers indicate versions of processors to facilitate modify control and tracking. Stepping also allows an finish user to identify more than specifically which version of the processor their organization contains. This classification information may be needed by Intel when trying to decide the microprocessor'southward internal design or manufacturing characteristics.
Processor type Type indicates whether the Intel® Microprocessor was designed for installation by a consumer (stop user) or by a professional person PC arrangement integrator, service company, or manufacturer. The processor type depends on whether the processor is a single processor, dual processor, or an Intel® OverDrive® Processor.
  • Type 1 indicates that the microprocessor was intended for installation by a consumer (for example, upgrade such as an Intel® OverDrive® Processor).
  • Type 0 indicates that the microprocessor was intended for installation by a professional PC system integrator, service company or manufacturer.
Reported frequency This is the bodily operating frequency of the processor and system bus every bit measured by the Intel® Processor Identification Utility. The utility may report a current operating frequency that is slightly college or lower than the expected frequency for your processor. Frequency differences within 1% are due to slight variations in the manufacturing of system components, and are considered to be operating inside specifications.
Intel® Streaming SIMD Extensions Streaming SIMD Extensions (SSE) are new instructions designed to reduce the overall number of instructions required to execute a particular plan chore, which can result in an overall operation increase. The Intel® Processor Identification Utility reports the presence of SSE, SSE2, SSE3 and SSE4 instruction sets.
System jitney overclocking Operation of the organization bus higher up the processor's specified system bus frequency (for example, operating the system bus at 533 MHz with a processor intended for operation on a 400 MHz organization coach). This typically forces the processor to run at a frequency above its intended specification. Refer to the overclock definition for more information.

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Source: https://www.intel.com/content/www/us/en/support/articles/000006513/processors.html

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